251 lines
13 KiB
Arduino
251 lines
13 KiB
Arduino
 
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#ifdef SN75512
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//=============================================================================================
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// Driver for VFD (Vacuum Fluorescent Display) tubes driven by 2x cascaded Texas Instruments
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// SN75512 serial-in / high-voltage parallel-out shift-register + segment/grid driver ICs.
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//
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// Wiring / protocol:
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// - DATA/CLK: plain serial shift-register bit-banging, MSB first (see writeDisplay()).
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// - The two SN75512 chips are daisy-chained (12 outputs each) into one 24-bit (DATABITS)
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// shift register: shift all 24 bits in, then pulse LE (Latch Enable) once to transfer the
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// shifted-in bits to the chips' parallel high-voltage outputs (glitch-free update - the
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// outputs only change on the LE pulse, not while shifting).
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// - STROBE is the chip's display blank/enable input (per the pin comment below: 1=display
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// OFF, 0=display ON) and is toggled once per digit refresh to implement brightness dimming
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// (see the brightCounter[] dithering trick in writeDisplay()).
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// - Platform: ESP8266 only - uses direct WRITE_PERI_REG() GPIO register access instead of
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// digitalWrite() because bit-banging 24 bits per digit, at the multiplex refresh rate,
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// needs to be much faster than the Arduino digitalWrite() call overhead allows.
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//
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// NOTE: no CLOCK_NN block currently active in clocks.h defines SN75512 (grep of clocks.h for
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// "SN75512" / "#define SN75512" comes up empty) - it only appears as a commented-out option in
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// the driver-selection list in ESP32_UniClock2.ino. This driver therefore currently looks like
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// a legacy/orphan module not wired to any active clock configuration.
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//=============================================================================================
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// 2 x SN75512
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char tubeDriver[] = "SN75512";
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#define VFDrefresh 1200 //msec, Multiplex time period. Greater value => slower multiplex frequency
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//NOTE: comment says "msec" but this value is passed straight to timer1_write() (ESP8266
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//hw timer1 in TIM_DIV16/TIM_EDGE/TIM_SINGLE mode, i.e. ~5MHz tick rate => ~0.2us/tick,
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//see startTimer() in ESP32_UniClock2.ino) - so the real unit is timer ticks (~0.2us
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//each), not milliseconds. The label is misleading but functionally harmless.
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#define DATABITS 24 //total length of the shift registers (2 x 12-bit SN75512, daisy-chained)
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//Fill this table with the bit positions of the shift registers!
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//Bit position = index (0-based) of that output within the 24-bit combined (2-chip) shift
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//register, in the order the bits are shifted out (see writeDisplay(): bit DATABITS-1 goes
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//out first). segmentEnablePins order must match the a,b,c,d,e,f,g,DP order of charDefinition[].
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byte segmentEnablePins[] = {16,17,18,19,20,21,22,23}; //segment enable bits (a,b,c,d,e,f,g,DP) (You MUST define always 8 bits!!!)
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byte digitEnablePins[] = {0,1,2,3,4,5,6,7,8}; //digit enable bits (You may define any number of digits between 1 and 10 )
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//SN75512 control pins
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#define PIN_LE 13 // D7 Shift Register Latch Enable
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#define PIN_CLK 12 // D6 Shift Register Clock
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#define PIN_DATA 14 // D5 Shift Register Data
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#define PIN_STROBE 5 // D1 Shift Register Strobe (1=display off 0=display on)
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//Precomputed GPIO bitmasks (1<<pin) for use with the low-level ESP8266 WRITE_PERI_REG()/
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//PIN_OUT_SET/PIN_OUT_CLEAR register access in writeDisplay() - much faster than digitalWrite(),
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//needed because the whole 24-bit frame must be bit-banged out within one multiplex refresh slot.
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#define PIN_LE_BIT 1<<PIN_LE
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#define PIN_CLK_BIT 1<<PIN_CLK
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#define PIN_DATA_BIT 1<<PIN_DATA
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#define PIN_STROBE_BIT 1<<PIN_STROBE
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//------------------abcdefgDP---------------- definition of different characters
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//Each byte is a 7-segment+DP mask, MSB=a ... LSB=DP (bit7=a, bit6=b, ... bit1=g, bit0=DP).
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//generateBitTable() below expands these into the actual 24-bit shift-register bitmaps
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//(charTable[]) using segmentEnablePins[] as the a..DP -> shift-register-bit-position map.
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//Indices 0-9 = digits, 10=BLANK, 11=minus, 12=decimal point, 13-20 = extra glyphs
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//(A,P,C,deg,%,lower-circle,I,F) - these indices must line up with the digit[]/newDigit[]
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//buffer value convention documented in the core .ino file.
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byte charDefinition[] = {
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B11111100, //0: abcdef
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B01100000, //1: bc
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B11011010, //2: abdeg
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B11110010, //3: abcdg
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B01100110, //4: bcfg
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B10110110, //5: acdfg
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B10111110, //6: acdefg
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B11100000, //7: abc
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B11111110, //8: abcdefg
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B11110110, //9: abcdfg
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B00000000, // : BLANK (10)
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B00000010, //-: minus (11)
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B00000001, // decimal point (12)
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B11101110, // A abcefg (13)
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B11001110, // P abefg (14)
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B10011100, // C adef (15)
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B11000110, //grad (upper circle) abfg (16)
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B10110100, //% acdf (17)
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B00111010, //lower circle cdeg (18)
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B01100000, //I bc (19)
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B10001110 //F aefg (20)
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};
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#define MAXCHARS sizeof(charDefinition)
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#define MAXSEGMENTS sizeof(segmentEnablePins)
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int maxDigits = sizeof(digitEnablePins);
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uint32_t charTable[MAXCHARS]; //generated pin table from segmentDefinitions
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uint32_t segmentEnableBits[MAXSEGMENTS]; //bitmaps, generated from EnablePins tables
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uint32_t digitEnableBits[10];
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//-----------------------------------------------------------------------------------------
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void ICACHE_RAM_ATTR writeDisplay(){
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static volatile uint32_t val = 0;
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static volatile byte pos = 0;
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//Per-digit dithering/duty-cycle phase counters, one per tube position (up to 10 supported here).
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//Each entry free-runs 1..MAXBRIGHTNESS and is compared against the target brightness to decide
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//ON/OFF for that digit's current refresh slot (see below) - a cheap "N-cycle duty modulation"
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//dimmer rather than true PWM within one frame. The staggered starting phases {0,9,2,8,4,7,6,5,3,1}
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//(instead of all starting at 0) spread each digit's ON pulses across different points in the
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//brightness cycle, which avoids all digits blinking on/off in visible lock-step and reduces
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//perceived flicker/beating between adjacent tubes.
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static volatile int brightCounter[] = {0,9,2,8,4,7,6,5,3,1};
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//https://sub.nanona.fi/esp8266/timing-and-ticks.html
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//One tick is 1us / 80 = 0.0125us = 12.5ns on 80MHz
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//One tick is 1us / 80 = 0.0125us = 6.25ns on 160MHz
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// 1 NOP is 1 tick
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//noInterrupts();
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if (EEPROMsaving) { //stop refresh, while EEPROM write is in progress!
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timer1_write(VFDrefresh); //TIM_SINGLE (one-shot) mode requires re-arming the timer every call,
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return; //even when skipping the refresh, or the ISR would never fire again.
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}
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//Brightness gating for THIS digit position (pos), applied BEFORE this position's segment data
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//is shifted out below. STROBE is the chip's global blank input (LOW=display on, HIGH=off, per
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//the pin comment above), so this briefly leaves the PREVIOUS digit's already-latched pattern
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//on screen at the new brightness-derived on/off state until the new data is latched via LE
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//further down. With a ~1200-tick (see VFDrefresh) refresh period this overlap is a small
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//fraction of the slot and isn't visually significant.
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if (brightCounter[pos] % MAXBRIGHTNESS < (displayON ? prm.dayBright : prm.nightBright))
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WRITE_PERI_REG( PIN_OUT_CLEAR, PIN_STROBE_BIT ); //ON
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else
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WRITE_PERI_REG( PIN_OUT_SET, PIN_STROBE_BIT ); //OFF
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for (int t=0; t<4;t++) asm volatile ("nop");
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brightCounter[pos]++;
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if (brightCounter[pos]>MAXBRIGHTNESS) brightCounter[pos] = 1;
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//NOTE: digit[pos] indexes charTable[] (built from charDefinition[], MAXCHARS=21 entries)
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//directly with no bounds check. If digit[pos] were ever >=21 this would read out-of-bounds
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//memory. In practice the rest of the firmware is expected to only ever write valid glyph
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//codes (0-20) into digit[], so this is a latent risk rather than an observed failure.
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val = (digitEnableBits[pos] | charTable[digit[pos]]); //the full bitmap to send to MAX chip
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if (digitDP[pos]) val = val | charTable[12]; //Decimal Point
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//Shift out all 24 bits, MSB first (bit DATABITS-1 down to bit 0), matching the bit-position
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//convention used by segmentEnablePins[]/digitEnablePins[] (index = bit position, MSB shifted
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//first so it ends up in the "first" chip in the daisy-chain after the final LE latch).
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//Note the asymmetric NOP padding: a '1' bit only pads 4 NOPs before raising CLK, while a '0'
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//bit pads 8 - this compensates for the extra WRITE_PERI_REG() call needed to explicitly clear
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//the DATA line (vs. just letting it stay set) so that DATA has equal setup time before CLK
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//rises in both cases; hand-tuned bit-bang timing, not an accidental asymmetry.
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for (int i=0; i<DATABITS; i++) {
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if ((val & (uint32_t)1 << (DATABITS -1 - i)) ) {
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WRITE_PERI_REG( PIN_OUT_SET, PIN_DATA_BIT );
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for (int t=0; t<4;t++) asm volatile ("nop");
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}
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else {
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WRITE_PERI_REG( PIN_OUT_CLEAR, PIN_DATA_BIT );
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for (int t=0; t<8;t++) asm volatile ("nop");
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}
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WRITE_PERI_REG( PIN_OUT_SET, PIN_CLK_BIT );
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for (int t=0; t<8;t++) asm volatile ("nop");
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WRITE_PERI_REG( PIN_OUT_CLEAR, PIN_CLK_BIT );
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for (int t=0; t<4;t++) asm volatile ("nop");
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} //end for
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//Latch: pulse LE high then low to transfer the just-shifted 24 bits from the SN75512's
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//internal shift register into its output latch - this is what actually updates the VFD
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//outputs; the outputs stay unchanged (no visible glitching) while bits are still shifting.
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WRITE_PERI_REG( PIN_OUT_SET, PIN_LE_BIT );
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for (int t=0; t<4;t++) asm volatile ("nop");
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WRITE_PERI_REG( PIN_OUT_CLEAR, PIN_LE_BIT );
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pos++; if (pos >= maxDigits) pos = 0;
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timer1_write(VFDrefresh); //re-arm the one-shot timer1 for the next digit's refresh
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//interrupts();
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}
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//One-time (setup) precomputation: turns the human-editable pin-index tables
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//(segmentEnablePins[]/digitEnablePins[]) and the per-glyph segment masks (charDefinition[])
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//into ready-to-OR 24-bit shift-register bitmaps, so writeDisplay() never has to do this bit
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//translation work inside the timing-critical ISR - it just OR's digitEnableBits[pos] |
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//charTable[digit[pos]] together.
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void generateBitTable() {
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uint32_t out;
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DPRINTLN("--- Generating segment pins bitmap ---");
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for (int i=0;i<MAXSEGMENTS;i++) {
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segmentEnableBits[i] = (uint32_t)1<<segmentEnablePins[i];
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//DPRINT(i); DPRINT(": "); DPRINTLN(segmentEnableBits[i],BIN);
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}
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DPRINTLN("--- Generating digit pins bitmap ---");
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for (int i=0;i<maxDigits;i++) {
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digitEnableBits[i] = (uint32_t)1 << digitEnablePins[i];
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//DPRINT(i); DPRINT(": "); DPRINTLN( digitEnableBits[i],BIN);
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}
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DPRINTLN("---- Generated Character / Pins table -----");
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for (int i=0;i<MAXCHARS;i++) {
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out = 0;
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//DPRINT(i); DPRINT(": ");
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//DPRINT(charDefinition[i],BIN); //DPRINT(" = ");
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//j runs 0..7 through charDefinition's bits from MSB(a, bit7) to LSB(DP, bit0); since
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//segmentEnablePins[] is stored in the same a..DP order, j directly indexes it (no reversal
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//needed here, unlike the SN75518 driver which stores segments in the opposite bit order).
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for (int j=0;j<=7;j++) //from a to g
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if ((charDefinition[i] & (uint32_t)1<<(7-j)) != 0) {
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out = out | segmentEnableBits[j]; //DPRINT("1");
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}
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//else DPRINT("0");
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//DPRINT(" >> ");
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charTable[i] = out;
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//DPRINTLN(charTable[i],BIN);
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} //end for
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}
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void setup_pins() {
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#if defined(ESP8266)
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#else
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//Enforced at compile time because writeDisplay() bit-bangs via ESP8266-only
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//WRITE_PERI_REG()/PIN_OUT_SET/PIN_OUT_CLEAR register macros and relies on the ESP8266
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//timer1 API (timer1_write, TIM_SINGLE) armed in startTimer() - none of that exists on ESP32.
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#error "Only 8266 Board is supported!"
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#endif
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DPRINTLN("Clock with SN75512 - Setup pins...");
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pinMode(PIN_LE, OUTPUT); regPin(PIN_LE,"PIN_LE");
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pinMode(PIN_STROBE,OUTPUT); regPin(PIN_STROBE,"PIN_STROBE");
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pinMode(PIN_DATA,OUTPUT); regPin(PIN_DATA,"PIN_DATA");
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pinMode(PIN_CLK, OUTPUT); regPin(PIN_CLK,"PIN_CLK");
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digitalWrite(PIN_STROBE,LOW); //brightness
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generateBitTable(); //must run before the timer/ISR starts, since writeDisplay() reads charTable[]/digitEnableBits[]/segmentEnableBits[]
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digitsOnly = false;
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startTimer();
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}
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//POSSIBLE ISSUE: both clearTubes() and writeDisplaySingle() are empty stubs - they satisfy the
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//common driver interface (see other driver files / ESP32_UniClock2.ino) syntactically, but do
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//not actually blank the display or perform a blocking one-shot write. Note that the core .ino no
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//longer calls clearTubes() from anywhere at all (its former caller, disableDisplay(), has been
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//removed entirely as dead code), so in practice this is moot for now regardless. Given this driver
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//is not wired to any active CLOCK_NN (see file header), this looks like an incomplete/legacy
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//stub rather than something exercised by current configurations - flagged for confirmation.
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void clearTubes() {}
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void writeDisplaySingle() {}
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#endif
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